Abstract: This paper presents the design of ternary adder schematics with graphene nanoribbon field effect transistor (GNRFET). The adder circuits are developed by using the basic, universal and ...

Vector Post-Training Quantization (VPTQ) is a novel Post-Training Quantization method that leverages Vector Quantization to high accuracy on LLMs at an extremely low bit-width (<2-bit). VPTQ can ...

Objective: This study aims to examine seven distinct design methods for creating Full Adder circuits, from simple gate-level designs to more complex transistor-level and mirror adder architectures.