EE World Online

What are the benefits of RISC-V in AI, ML, and embedded systems?

The open-source nature of RISC-V brings the benefits of a modular and royalty-free instruction set architecture (ISA) that eliminates licensing fees, can accelerate development, and fosters ...
Nasdaq

Semidynamics and Arteris Partner To Accelerate AI RISC-V System-on-Chip Development

Arteris and Semidynamics partnership enhances the flexibility and highly configurable interoperability of RISC-V processor IP with system IP. Integrated and optimized solutions will focus on ...
Design-Reuse

Mirabilis Design creates the first RISC-V system-level architecture exploration solution

Santa Clara, CA. — May 20, 2020 — Mirabilis Design announced today the VisualSim RISC-V system modeling and simulation environment. With this release, VisualSim provides a complete RISC-V modeling ...
Design-Reuse

First RISC-V-Based System-on-Chip (SoC) FPGA Enters Mass Production

Microchip’s Mi-V ecosystem has enabled customers to ramp products based on PolarFire ® devices more quickly, from prototypes to production CHANDLER, Ariz., June 8, 2022 – The first SoC Field ...
Geeky Gadgets

RISC OS alternative operating system hits Kickstarter

A new Kickstarter project has launched this month, looking for backers to help build a power saving computer operating system and push RISC OS to more hardware platforms. German developer Stefan ...
New Electronics

HighTec C/C++ Compiler suite supports Nuclei System Technology’s RISC-V IP

HighTec EDV-Systeme, a provider of automotive C/C++ compiler solutions, has announced that it has added support for Nuclei System Technology’s RISC-V CPU IP. C/C++ Compiler suite supports Nuclei ...
TweakTown

RISC-V systems support replacing RAM sticks WITHOUT powering off the system

The upcoming version 6.11 of the mainline Linux kernel has support for RISC-V memory hot plugging, meaning you can pull RAM sticks out of your PC without turning it off... very nice. The Linux kernel ...
Semiconductor Engineering

FPGA-Proven RISC-V System With Hardware Accelerated Task Scheduling

A technical paper titled “Enabling HW-based Task Scheduling in Large Multicore Architectures” was published by researchers at Barcelona Supercomputing Center, University of Campinas, University of Sao ...
PC Magazine

RISC-based system

A computer system that uses a RISC CPU such as a SPARC, PowerPC or MIPS chip. See RISC. THIS DEFINITION IS FOR PERSONAL USE ONLY. All other reproduction requires permission.
Computing

Acorn Computer's RISC OS operating system finally goes fully open source

RISC OS, the operating system that powered Acorn Computer's Archimedes computers in the 1980s and 1990s, has been fully released to open source. The move was welcomed by Raspberry Pi CEO Eben Upton: ...