Used Virtex-4 FPGA and Verilog to design an SFI-4.1 interface, a 16-channel, source-synchronous LVDS interface operating at single data rate. Each channel operates at the speed of 630 Mbps.
The rate of adoption of serial technology in high-end system design has reached critical mass. As shown in Fig 1, this point is supported by the fact that 92% of respondents in a recent EE Times ...
Different types of interface standards used in LVDS. Recommendations for interfacing FPGAs to ADCs. Methods of troubleshooting when connecting to the AD9268 ADC. 1. Multiple interface possibilities ...
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